Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture by jon stokes Page A
Authors: jon stokes
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register-relative addressing technique
described next they make managing code and data traffic between the
processor and massive amounts of main memory much less complex.
Register-Relative Addressing
In real-world programs, loads and stores most often use register-relative
addressing , which is a way of specifying memory addresses relative to a
register that contains a fixed base address .
For example, we’ve been using D to store memory addresses, so let’s say
that on the DLW-1 we can assume that, unless it is explicitly told to do other-
wise, the operating system always loads the starting address (or base address)
of a program’s data segment into D. Remember that code and data are
logically separated in main memory, and that data flows into the processor
from a data storage area, while code flows into the processor from a special
code storage area. Main memory itself is just one long row of undifferentiated
memory cells, each one byte in width, that store numbers. The computer
carves up this long row of bytes into multiple segments, some of which store
code and some of which store data.
16
Chapter 1
A data segment is a block of contiguous memory cells that a program
stores all of its data in, so if a programmer knows a data segment’s starting
address (base address) in memory, he or she can access all of the other
memory locations in that segment using this formula:
base address + offset
where offset is the distance in bytes of the desired memory location from the data segment’s base address.
Thus, load and store instructions in DLW-1 assembly would normally
look something like this:
Code
Comments
load #(D + 108), A
Read the contents of the memory cell at location #(D + 108) into A.
store B, #(D + 108)
Write the contents of B into the memory cell at location #(D + 108).
In the case of the load, the processor takes the number in D, which is the
base address of the data segment, adds 108 to it, and uses the result as the
load’s destination memory address. The store works in the exact same way.
Of course, this technique requires that a quick addition operation (called
an address calculation ) be part of the execution of the load instruction, so this is why the load-store units on modern processors contain very fast integer addition hardware. (As we’ll learn in Chapter 4, the load-store unit is the execution
unit responsible for executing load and store instructions, just like the
arithmetic-logic unit is responsible for executing arithmetic instructions.)
By using register-relative addressing instead of absolute addressing (in which memory addresses are given as immediate values), a programmer can write
programs without knowing the exact location of data in memory. All the
programmer needs to know is which register the operating system will place
the data segment’s base address in, and he or she can do all memory accesses
relative to that base address. In situations where a programmer uses absolute
addressing, when the operating system loads the program into memory, all
of the program’s immediate address values have to be changed to reflect the
data segment’s actual location in memory.
Because both memory addresses and regular integer numbers are stored
in the same registers, these registers are called general-purpose registers (GPRs) .
On the DLW-1, A, B, C, and D are all GPRs.
Basic Computing Concepts
17
T H E M E C H A N I C S O F P R O G R A M
E X E C U T I O N
Now that we understand the basics of computer organi-
zation, it’s time to take a closer look at the nuts and
bolts of how stored programs are actually executed by
the computer. To that end, this chapter will cover
core programming concepts like machine language,
the programming model, the instruction set architec-
ture, branch instructions, and the fetch-execute loop.
Opcodes and Machine Language
If you’ve been following the discussion so far, it shouldn’t surprise you to
learn
described next they make managing code and data traffic between the
processor and massive amounts of main memory much less complex.
Register-Relative Addressing
In real-world programs, loads and stores most often use register-relative
addressing , which is a way of specifying memory addresses relative to a
register that contains a fixed base address .
For example, we’ve been using D to store memory addresses, so let’s say
that on the DLW-1 we can assume that, unless it is explicitly told to do other-
wise, the operating system always loads the starting address (or base address)
of a program’s data segment into D. Remember that code and data are
logically separated in main memory, and that data flows into the processor
from a data storage area, while code flows into the processor from a special
code storage area. Main memory itself is just one long row of undifferentiated
memory cells, each one byte in width, that store numbers. The computer
carves up this long row of bytes into multiple segments, some of which store
code and some of which store data.
16
Chapter 1
A data segment is a block of contiguous memory cells that a program
stores all of its data in, so if a programmer knows a data segment’s starting
address (base address) in memory, he or she can access all of the other
memory locations in that segment using this formula:
base address + offset
where offset is the distance in bytes of the desired memory location from the data segment’s base address.
Thus, load and store instructions in DLW-1 assembly would normally
look something like this:
Code
Comments
load #(D + 108), A
Read the contents of the memory cell at location #(D + 108) into A.
store B, #(D + 108)
Write the contents of B into the memory cell at location #(D + 108).
In the case of the load, the processor takes the number in D, which is the
base address of the data segment, adds 108 to it, and uses the result as the
load’s destination memory address. The store works in the exact same way.
Of course, this technique requires that a quick addition operation (called
an address calculation ) be part of the execution of the load instruction, so this is why the load-store units on modern processors contain very fast integer addition hardware. (As we’ll learn in Chapter 4, the load-store unit is the execution
unit responsible for executing load and store instructions, just like the
arithmetic-logic unit is responsible for executing arithmetic instructions.)
By using register-relative addressing instead of absolute addressing (in which memory addresses are given as immediate values), a programmer can write
programs without knowing the exact location of data in memory. All the
programmer needs to know is which register the operating system will place
the data segment’s base address in, and he or she can do all memory accesses
relative to that base address. In situations where a programmer uses absolute
addressing, when the operating system loads the program into memory, all
of the program’s immediate address values have to be changed to reflect the
data segment’s actual location in memory.
Because both memory addresses and regular integer numbers are stored
in the same registers, these registers are called general-purpose registers (GPRs) .
On the DLW-1, A, B, C, and D are all GPRs.
Basic Computing Concepts
17
T H E M E C H A N I C S O F P R O G R A M
E X E C U T I O N
Now that we understand the basics of computer organi-
zation, it’s time to take a closer look at the nuts and
bolts of how stored programs are actually executed by
the computer. To that end, this chapter will cover
core programming concepts like machine language,
the programming model, the instruction set architec-
ture, branch instructions, and the fetch-execute loop.
Opcodes and Machine Language
If you’ve been following the discussion so far, it shouldn’t surprise you to
learn
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